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Stream Qwen PLE embeddings

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This commit is contained in:
Georg Bauer
2026-09-03 21:12:20 +02:00
parent c414640050
commit 87ccf67d0c
4 changed files with 893 additions and 78 deletions
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9
native/metal/ds4_metal.m
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@@ -11762,7 +11762,7 @@ int ds4_gpu_qwen_dispatch(
id<MTLComputeCommandEncoder> enc = ds4_gpu_compute_encoder(cb);
if (!enc) return 0;
[enc setComputePipelineState:pipeline];
[enc setBytes:args length:sizeof(*args) atIndex:0];
ds4_gpu_qwen_kernel_args bound_args = *args;
const DS4MetalTensor *tensors[4] = {
ds4_gpu_tensor_const_obj(out),
@@ -11788,8 +11788,13 @@ int ds4_gpu_qwen_dispatch(
if (owned) [cb commit];
return 0;
}
[enc setBuffer:weight offset:(NSUInteger)inner atIndex:5 + i];
/* Metal resource offsets are four-byte aligned. Preserve an arbitrary
* safetensors data offset for the Qwen kernels to decode explicitly. */
const uint64_t aligned_inner = inner & ~3ull;
bound_args.u[13 + i] = (uint32_t)(inner - aligned_inner);
[enc setBuffer:weight offset:(NSUInteger)aligned_inner atIndex:5 + i];
}
[enc setBytes:&bound_args length:sizeof(bound_args) atIndex:0];
const NSUInteger width = pipeline.threadExecutionWidth;
const NSUInteger max_threads = pipeline.maxTotalThreadsPerThreadgroup;